1. Field of the Invention
The present invention relates to a method for fabricating capacitors of a semiconductor device, and more particularly to a method for fabricating capacitors using a selective growth technique and a technique for adjusting the dimension of a storage electrode contact mask to provide an increased capacitance in highly integrated semiconductor devices.
2. Description of the Prior Art
Recent high integration trend of semiconductor devices inevitably involves a reduction in cell dimension. However, such a reduction in cell dimension results in a difficulty to form capacitors having a sufficient capacitance. This is because the capacitance is proportional to the surface area of capacitor. In a case of a dynamic random access memory (DRAM) device constituted by one metal oxide semiconductor (MOS) transistor and one capacitor, in particular, it is important to reduce the cell dimension and yet obtain a high capacitance of the capacitor, for the high integration of the DRAM device. For increasing the capacitance, various researches have been conducted. For example, there have been known use of dielectric films made of a dielectric material exhibiting a high dielectric constant, formation of thin dielectric layers, and formation of capacitors having an increased surface area.
However, all of these methods have their own problems, respectively. Although various materials, such as Ta.sub.2 O.sub.3, TiO.sub.2 or SrTiO.sub.3, have been proposed as the dielectric material exhibiting a high dielectric constant, their reliance and thin film characteristics have not been confirmed. For this reason, it is difficult to practically use such dielectric materials for semiconductor devices. The reduction in thickness of dielectric layer results in damage of the dielectric layer severely affecting the reliance of the capacitor.
In order to increase the surface area of the capacitor, various capacitor structures have also been proposed. They include a fin structure, a labyrinthian structure with a cylindrical or rectangular shape, and a structure having hemispherical grain of silicon on storage electrode. In these capacitor structures, however, the capacitance is still insufficient because the surface area of the capacitor is still small due to its reduction caused by the high integration of DRAM.